Defines

Collaboration diagram for Defines:

Macros
#define	SCU_BUS_SPI   1
#define	SCU_BUS_I2C0   2
#define	SCU_BUS_I2C1   3
#define	SCU_BUS_LPADC0   0x10
#define	SCU_BUS_LPADC1   0x11
#define	SCU_BUS_LPADC2   0x12
#define	SCU_BUS_LPADC3   0x13
#define	SCU_BUS_HPADC0   0x14
#define	SCU_BUS_HPADC1   0x15
#define	SCU_INST_SEND(val)   ((val) & 0xff)
#define	SCU_INST_RECV(n)   ((1 << 8) | (((n) - 1) & 0x7) << 12)
#define	SCU_INST_TERM   (1 << 11)
#define	SCU_INST_RESTART   (1 << 10)
#define	SCU_INST_STOP   (1 << 9)
#define	SCU_INST_LAST   (SCU_INST_TERM|SCU_INST_STOP)
#define	SEQ_TYPE_NORMAL   0
#define	SEQ_TYPE_DECI   1
#define	SCU_EV_RISE_EN   (1 << 31)
#define	SCU_EV_FALL_EN   (1 << 30)
#define	SCU_EV_OUT8BITS   (1 << 29)
#define	SCU_EV_OUTSHIFT   16
#define	SCU_EV_OUTMASK   (3 << SCU_EV_OUTSHIFT)
#define	SCU_EV_OUTALWAYS   (0 << SCU_EV_OUTSHIFT)
#define	SCU_EV_OUTSTART   (1 << SCU_EV_OUTSHIFT)
#define	SCU_EV_OUTSTOP   (2 << SCU_EV_OUTSHIFT)
#define	SCU_EV_NOTOUT   (3 << SCU_EV_OUTSHIFT)
#define	SCU_EV_WRITESAMPLEMASK   0xfff
#define	SCU_EV_WRITESAMPLES(sample)   ((sample) & SCU_EV_WRITESAMPLEMASK)
#define	SCU_EV_RISE   (1)
#define	SCU_EV_FALL   (2)
#define	SCU_LEVELADJ_X1   (0)
#define	SCU_LEVELADJ_X2   (1)
#define	SCU_LEVELADJ_X4   (2)
#define	SCU_LEVELADJ_X8   (3)

Detailed Description

Macro Definition Documentation

SCU_BUS_SPI

#define SCU_BUS_SPI   1

SPI bus

SCU_BUS_I2C0

#define SCU_BUS_I2C0   2

I2C0 bus

SCU_BUS_I2C1

#define SCU_BUS_I2C1   3

I2C1 bus

SCU_BUS_LPADC0

#define SCU_BUS_LPADC0   0x10

LPADC0

SCU_BUS_LPADC1

#define SCU_BUS_LPADC1   0x11

LPADC1

SCU_BUS_LPADC2

#define SCU_BUS_LPADC2   0x12

LPADC2

SCU_BUS_LPADC3

#define SCU_BUS_LPADC3   0x13

LPADC3

SCU_BUS_HPADC0

#define SCU_BUS_HPADC0   0x14

HPADC1

SCU_BUS_HPADC1

#define SCU_BUS_HPADC1   0x15

HPADC2

SCU_INST_SEND

#define SCU_INST_SEND

(

val

)

((val) & 0xff)

Send 1 byte instruction

SCU_INST_RECV

#define SCU_INST_RECV

(

n

)

((1 << 8) | (((n) - 1) & 0x7) << 12)

Receive n byte instruction (n: 1 - 8)

SCU_INST_LAST

#define SCU_INST_LAST   (SCU_INST_TERM|SCU_INST_STOP)

Indicate this instruction is last

SEQ_TYPE_NORMAL

#define SEQ_TYPE_NORMAL   0

Normal sequencer

SEQ_TYPE_DECI

#define SEQ_TYPE_DECI   1

Decimator

SCU_EV_RISE_EN

#define SCU_EV_RISE_EN   (1 << 31)

Rise event enable

SCU_EV_FALL_EN

#define SCU_EV_FALL_EN   (1 << 30)

Fall event enable

SCU_EV_OUT8BITS

#define SCU_EV_OUT8BITS   (1 << 29)

Output only upper 8 bits

SCU_EV_OUTALWAYS

#define SCU_EV_OUTALWAYS   (0 << SCU_EV_OUTSHIFT)

Always output to FIFO

SCU_EV_OUTSTART

#define SCU_EV_OUTSTART   (1 << SCU_EV_OUTSHIFT)

Output start after event occurred

SCU_EV_OUTSTOP

#define SCU_EV_OUTSTOP   (2 << SCU_EV_OUTSHIFT)

Output stop after event occurred

SCU_EV_NOTOUT

#define SCU_EV_NOTOUT   (3 << SCU_EV_OUTSHIFT)

No output to FIFO

SCU_EV_WRITESAMPLES

#define SCU_EV_WRITESAMPLES

(

sample

)

((sample) & SCU_EV_WRITESAMPLEMASK)

Output samples when event occurred

SCU_EV_RISE

#define SCU_EV_RISE   (1)

Rise (low to high) event occurred

SCU_EV_FALL

#define SCU_EV_FALL   (2)

Fall (high to low) event occurred

SCU_LEVELADJ_X1

#define SCU_LEVELADJ_X1   (0)

Level adjustment x1

SCU_LEVELADJ_X2

#define SCU_LEVELADJ_X2   (1)

Level adjustment x2

SCU_LEVELADJ_X4

#define SCU_LEVELADJ_X4   (2)

Level adjustment x4

SCU_LEVELADJ_X8

#define SCU_LEVELADJ_X8   (3)

Level adjustment x8